weeZee wrote: The signal off an unloaded alternator is a sinewave, with a loaded shunt R/R it is closer to a partial sinewave depending on the shunt/switching design. The point I made is that the signal is pretty clean (as your scope trace shows), you don't get switching ringing from the transistors like you do in an ignition circuit and as a result you don't get false triggering.
I think it's a stretch to call that signal a partial sinewave, but ok. Unfortunately, it is still not very useful since the regulator will be periodically shorting that signal to ground.
weeZee wrote: I believe I've mentioned earlier that this tach was designed for the original kettering ignition from a kz900 and is sensitive to the ringing from an aftermarket transistorized ignition system.
If it's designed for a Kz900 then it should be able to accept a 50% duty cycle signal, as that is approximately what a Kz900 dwell consists of...probably more like 55%, if I recall.
The ringing is due to residual coil energy after the spark ceases. This happens with both transistors and points. A filter should be able to clean that up.
Just to clarify:
I'm using the term "false-triggers", here, to mean a signal from the pickup or points that comes at an unexpected, undesired time that causes a spark to occur. The signal it produces at the coil is similar/same as a correctly timed, desired signal. The tach cannot discern the two, and thus registers an incorrect RPM.
This is opposed to spikes or other noise on the coil that "triggers" the tach to incorrectly register a spark event.
weeZee wrote: The reason a latch flip-flop is not used is because there is a minimum duration signal from a monostable that prevents false re-triggering from spikes.
If implemented correctly, the debounce circuit can work to reject spikes. But it won't necessarily reject false-triggers as defined above.
A filter can handle the spikes and noise, but also will not likely reject all false-triggers.
An SR latch would be better at rejecting the type of false-trigger described above. But the exact implementation would require an analysis of the false-trigger's timing. It's not random. The false-triggers may come and go during different periods, seeming random, but the exact timing is usually not random. False-triggers are usually in sync with the crankshaft, as can be seen by a timing light. But as I mentioned, I was only addressing the possibility of the Dyna S rest period being too short, not necessarily false-triggers or noise, which would be better addressed other ways.
weeZee wrote: You can build the circuit I've detailed and test it for yourself. It works.
The drawing appears to have a mistake in component value(s) so I don't think the circuit you show to be the one you intended. And possibly there is a wiring error in the drawing as well.
I've built that circuit many times and can tell you it won't work with a Dyna S (which is the ignition in question). A bare debounce circuit is not meant for that type of situation.
A debounce input signal (trigger, pin 2) should float high most of the time and briefly pull low. The Dyna S signal is opposite of that. It pulls low most of the time and briefly floats high. This results in the output staying high until the trigger returns to high. To correct this, an inverter of some type is needed at the trigger input. It can be a simple transistor with resistor.
But there are other problems as well, which may just be errors in the drawing.
First, the pin 4 hard-reset is tied to the input so the circuit will be forced to reset whenever the coil signal is low, which is most of the time. This will hold the output low. Even if an inverter is used, as mentioned above, the circuit will be forced into reset, which produces a low signal right when the input signal should be triggering a high signal. When the input signal goes high to pull the 555 out of reset, the trigger (pin 2) will also be high, which means the 555 never gets triggered, so the output will likely stay low all the time. Typically, pin 4 is just tied to pin 8 to disable the hard reset function.
It's possible not all 555's react to the reset-tied-to-trigger the same way, as that does create a slightly ambiguous timing condition, but the output on the ones I use would just stay low in this condition.
Second, the drawing appears to show 22K for the resistor ("22.K"). I think you meant 220K as that's what you mentioned in the earlier post. 22k gives about a .2msec pulse, whereas a 220k would give the aforementioned 2msec pulse (assuming the other issues are resolved). Maybe the capacitors are swapped? I often see .01 for the pin5 filter, and using .1 for the timing cap would also correct the pulse duration discrepancy. So maybe the .1 and the .01 were inadvertently swapped?
Another problem related to the input signal is that a coil primary produces spikes in the hundreds of volts. Obviously a 555 timer won't like that. You can use a simple blocking diode, like a 1N4007, but then that will affect the operation of the input signal with respect to the inverter requirement. So a couple more parts would be needed.